The present invention relates to communication frame sending methods and communication systems, and more particularly to such methods and systems suitable for a communication control unit, intervening between a high-ranking or host processor and a communication line, to autonomously generate an information field and send it to the communication line.
There are two kinds of frames that the communication control unit sends to the communication line:
a frame (a first kind of frame) which is read by the communication control unit from an information field section prepared beforehand in a memory outside the communication control unit by the high-ranking processor and sent to the communication line in accordance with a frame sending requirement by the high-ranking processor; and
a frame (a second kind of frame) which is all autonomously generated and sent by the communication control unit.
The present invention is especially concerned with a system for sending the second kind of frame.
In a conventional communication control unit, the transmission of the first kind of frame is performed as described, for example, in Papers of Technical Group on Switching Engineering, Inst. of Electronics, Information and Communication Engineers of Japan, SE 87-99 "Development of X.25 LAPB handling LSI". namely, in response to the transmission requirement from the high-ranking processor, the communication control unit loads the header portion (an address field and a control field) of a frame to be transmitted in a FIFO (First-In First-Out buffer) provided in the communication control unit and enables a direct memory access (DMA) transfer in order to read the contents of the information field in the external memory into the FIFO.
The second kind of frames all of which are generated by the communication control unit have substantially no information field or an information field of a length of about several bytes, if any. Therefore, the conventional communication control unit employs the following methods or systems:
(i) A communication system which omits the starting of the DMA transfer in the process of transmission of the first kind of frames. A microprocessor (.mu.CPU) in the communication control unit has stored in the sending FIFO all of the frames which it has generated, and then starts the transmission of the frames to a line interface (or serial interface) controller:
(ii) A system which has no sending FIFO in the communication control unit. A .mu.CPU in the communication control unit sends to the line interface controller a frame generated by the .mu.CPU, sequentially byte by byte or unit data by unit data, unit data being larger than one byte.
(iii) A communication system in which special-purpose hardware sequentially transfers the data generated by the .mu.CPU instead of the .mu.CPU in (ii).
If the communication control unit is intended to have a higher function in which part of the generation of an information field which is the function of the conventional high-ranking processor is performed in the communication control unit, and a frame having an information field is autonomously generated and sent in order to alleviate the load on the high-ranking processor, the conventional frame communication systems have the following problems:
The conventional system (i) is suitable for the communication control unit to generate a short frame including no information fields and to send it. However, if the communication control unit is intended to generate and transmit a long communication frame of an information field in this system, the maximum length of a transmittable frame is limited by the length of the sending FIFO and a frame longer than the sending FIFO cannot be sent. If the length of the sending FIFO is increased in order to increase the maximum length of the transmittable communication frame, a quantity of hardware in the communication control unit would be undesirably increased.
In the conventional system (ii), the .mu.CPU transfers all the data of the communication frame, so that the load to be processed will increase. If the .mu.CPU has continuously performed other processing having a high priority such as interrupt processing, the transfer of data to be transmitted is delayed and a transmission under run is undesirably likely to occur.
The conventional system (iii) has the problem that a quantity of hardware required for the communication control unit will increase. Especially, if the whole communication control unit including the FIFO, DMA controller and .mu.CPU is constituted on the same semiconductor substrate as one chip in order to miniaturize the communication control unit, it is desirable to suppress an increase in the quantity of hardware as much as possible.